1 1 1/12/01 supertex inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. no responsibility is assumed for possible omissions or inaccuracies. circuitry and specifications are subject to c hange without notice. for the latest product specifications, refer to the supertex website: http://www.supertex.com. for complete liability information on all supertex products, refer to the most curre nt databook or to the legal/disclaimer page on the supertex website. TN5335 n-channel enhancement-mode v ertical dmos fets features ? low threshold ?2.0v max. ? high input impedance ? low input capacitance ? fast switching speeds ? low on resistance ? free from secondary breakdown ? low input and output leakage applications ? logic level interfaces ?ideal for ttl and cmos ? solid state relays ? battery operated systems ? photo voltaic drives ? analog switches ? general purpose line drivers ? telecom switches ? modem hook switches package options note: see package outline section for dimensions. low threshold dmos technology these low threshold enhancement-mode (normally-off) transis- tors utilize a vertical dmos structure and supertex's well-proven silicon-gate manufacturing process. this combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in mos devices. characteristic of all mos structures, these devices are free from thermal runaway and thermally induced secondary breakdown. supertex? vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. absolute maximum ratings drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds. t o-243aa (sot-89) g d s d low threshold product marking for to-243aa where ? = 2-week alpha date code tn3s ? ordering information bv dss /r ds(on) v gs(th) i d(on) bv dgs (max) (max) (min) to-236ab to-243aa* wafer 350v 15 ? 2.0v 750ma TN5335k1 TN5335n8 TN5335nw * same as sot-89. product supplied on 2000 piece carrier tape reels. order number / package t o-236ab (sot-23) top view product marking for sot-23 where ? = 2-week alpha date code n3s ? s d g
2 1235 bordeaux drive, sunnyvale, ca 94089 tel: (408) 744-0100 ?fax: (408) 222-4895 www.supertex.com 1 1/12/01 ?001 supertex inc. all rights reserved. unauthorized use or reproduction prohibited. TN5335 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 10v v dd r gen 0v 0v thermal characteristics switching waveforms and test circuit package i d (continuous)* i d (pulsed) power dissipation jc ja i dr *i drm @ t a = 25 c c/w c/w to-236ab 110ma 800ma 0.36w 200 350 110ma 800ma to-243aa 230ma 1.3a 1.6w ? 15 78 ? 230ma 1.3a * i d (continuous) is limited by max rated t j . ? mounted on fr5 board, 25mm x 25mm x 1.57mm. significant p d increase possible on ceramic substrate. symbol parameter min typ max unit conditions bv dss drain-to-source breakdown voltage 350 v v gs = 0v, i d = 100 a v gs(th) gate threshold voltage 0.6 2.0 v v gs = v ds , i d = 1ma ? v gs(th) change in v gs(th) with temperature -4.5 mv/ cv gs = v ds , i d = 1ma i gss gate body leakage 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current 1.0 av gs = 0v, v ds = 100v 10 av gs = 0v, v ds = max rating 1.0 ma v gs = 0v, v ds = 0.8 max rating t a = 125 c 5.0 na v gs = 0v, v ds = 330v i d(on) on-state drain current 300 v gs = 4.5v, v ds = 25v 750 ma v gs = 10v, v ds = 25v r ds(on) static drain-to source 15 v gs = 3.0v, i d = 20ma on-state resistance 15 ? v gs = 4.5v, i d = 150ma 15 v gs = 10v, i d = 200ma ? r ds(on) change in r ds(on) with temperature 1.0 %/ cv gs = 4.5v, i d = 150ma g fs forward transconductance 125 m v ds = 25v, i d = 200ma c iss input capacitance 110 v gs = 0v, v ds = 25v c oss common source output capacitance 60 pf f = 1mhz c rss reverse transfer capacitance 22 t d(on) turn-on delay time 20 v dd = 25v, t r rise time 15 ns i d = 150ma, t d(off) turn-off delay time 25 r gen = 25 ? t f fall time 25 v sd diode forward voltage drop 1.8 v v gs = 0v, i sd = 200ma t rr reverse recovery time 800 ns v gs = 0v, i sd = 200ma notes: 1. all d.c. parameters 100% tested at 25 c unless otherwise stated. (pulse test: 300 s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. electrical characteristics (@ 25 c unless otherwise specified) ?
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